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1

Exact Delay Fault Coverage in Sequential Logic Under Any Delay Fault Model

Mahilchi Milir Vaseekar Kumar, Spyros Tragoudas, Sreejit Chakravarty, Rathish Jayabharathi

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2006

Language:

english

File:

PDF, 275 KB

english, 2006

2

[IEEE 2012 IEEE 30th International Conference on Computer Design (ICCD 2012) - Montreal, QC, Canada (2012.09.30-2012.10.3)] 2012 IEEE 30th International Conference on Computer Design (ICCD) - Non-enumerative generation of statistical path delays for ATPG

Somashekar, Ahish Mysore, Tragoudas, Spyros, Gangadhar, Sreenivas, Jayabharathi, Rathish

Year:

2012

Language:

english

File:

PDF, 607 KB

english, 2012

3

[IEEE 2013 18th IEEE European Test Symposium (ETS) - Avignon, France (2013.05.27-2013.05.30)] 2013 18TH IEEE EUROPEAN TEST SYMPOSIUM (ETS) - Hybrid 3D pre-bonding test framework design

Chandran, Unni, Zhao, Dan, Jayabharathi, Rathish

Year:

2013

Language:

english

File:

PDF, 281 KB

english, 2013

4

FUZZY LOGIC FOR STANDARD CELL PLACEMENT

JAYABHARATHI, RATHISH, MANZOUL, MAHMOUD A.

Journal:

Cybernetics & Systems

Year:

1993

Language:

english

File:

PDF, 527 KB

english, 1993

5

[IEEE 2015 33rd IEEE International Conference on Computer Design (ICCD) - New York City, NY, USA (2015.10.18-2015.10.21)] 2015 33rd IEEE International Conference on Computer Design (ICCD) - Non-enumerative correlation-aware path selection

Somashekar, Ahish Mysore, Tragoudas, Spyros, Jayabharathi, Rathish

Year:

2015

Language:

english

File:

PDF, 204 KB

english, 2015

6

Non-enumerative Generation of Path Delay Distributions and Its Application to Critical Path Selection

Somashekar, Ahish Mysore, Tragoudas, Spyros, Jayabharathi, Rathish, Gangadhar, Sreenivas

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2016

Language:

english

File:

PDF, 582 KB

english, 2016